1. Field of Invention
This invention relates to defect inspection in semiconductor processes, and more particularly to a method for optimizing the inspection recipe of a defect inspection tool, and a pattern carrier (semiconductor substrate or photomask) for optimizing the same.
2. Description of Related Art
In an IC process, each wafer must be frequently inspected for defects in different layers. A defect inspection tool used in an IC process may utilize reflection of UV light, deep UV light or electron beam to detect defects, wherein the inspection recipe has to be optimized previously so that different types of defects in a layer can be well detected. The optimization may include inspecting a wafer with some defects of the target layer thereon by the defect inspection tool, and modifying the inspection recipe until there is a minimal number of undetected or partially detected defects under the inspection of the defect inspection tool. When the sensitivity of the inspection tool reaches to its limit, some of the defects cannot be found or fully detected.
A wafer with defects of the target layer thereon can be formed using a dedicated photomask with patterns of intentional defects. This approach costs a lot as requiring a dedicated photomask. Moreover, extra recipe and inspection time are also needed for the extra dedicated photomask. Since the intentional defects cannot accurately reflect the real defects of the product design, the inspection results are not accurate enough and more time is required to modify the inspection recipes.
Another method is to use some wafers with random defects from the production line for the test inspection of the defect inspection tool. However, when the wafers are damaged or not good enough for this purpose, the engineers have to pay efforts to find alternative wafers. Also, the engineers have to take hours to check for the defects by SEM review tools to confirm whether the defects of interest exist or not.
Another method is to modify the inspection recipe by trial and error. However, in-line recipe modification requires experienced operators and takes long time.
FIG. 8 illustrates an exemplary distribution of undetected or partially detected intentional defects in a test area (802) in the prior art. Among the intentional defects 840, the detected ones are each represented by the symbol “x” and the undetected or partially detected ones are each represented by a blank space. The intentional defects in the region 802-1 are found difficult to detect, and those in the region 802-2 are found marginal to the detection, wherein the intentional defects in the region 802-1 can be called nuisance defects. Since the defect inspection tool cannot identify the shapes of the various intentional defects 840, it is difficult to identify the types of the undetected or partially detected intentional defects in the regions 802-1 and 802-2.